mirror of
https://github.com/Threnklyn/esphome-dev.git
synced 2026-05-19 20:53:26 +02:00
Clyde Stubbs
5c26f95a4b
* Checkpoint * Checkpoint * Checkpoint * Revert hal change * Checkpoint * Checkpoint * Checkpoint * Checkpoint * ESP-IDF working * clang-format * use bus_list * Add spi_device; fix 16 bit transfer. * Enable multi_conf; Fix LSB 16 bit transactions * Formatting fixes * Clang-format, codeowners * Add test * Formatting * clang tidy * clang-format * clang-tidy * clang-format * Checkpoint * Checkpoint * Checkpoint * Revert hal change * Checkpoint * Checkpoint * Checkpoint * Checkpoint * ESP-IDF working * clang-format * use bus_list * Add spi_device; fix 16 bit transfer. * Enable multi_conf; Fix LSB 16 bit transactions * Formatting fixes * Clang-format, codeowners * Add test * Formatting * clang tidy * clang-format * clang-tidy * clang-format * Clang-tidy * Clang-format * clang-tidy * clang-tidy * Fix ESP8266 * RP2040 * RP2040 * Avoid use of spi1 as id * Refactor SPI code. Add support for ESP-IDF hardware SPI * Force SW only for RP2040 * Break up large transfers * Add interface: option for spi. validate pins in python. * Can't use match/case with Python 3.9. Check for inverted pins. * Work around target_platform issue with * Remove debug code * Optimize write_array16 * Show errors in hex * Only one spi on ESP32Cx variants * Ensure bus is claimed before asserting /CS. * Check on init/deinit * Allow maximum rate write only SPI on GPIO MUXed pins. * Clang-format * Clang-tidy * Fix issue with reads. * Finger trouble... * Make comment about missing SPI on Cx variants * Pacify CI clang-format. Did not complain locally?? * Restore 8266 to its former SPI glory * Fix per clang-format * Move validation and choice of SPI into Python code. * Add test for interface: config * Fix issues found on self-review. --------- Co-authored-by: Keith Burzinski <kbx81x@gmail.com>
50 lines
1.4 KiB
Python
50 lines
1.4 KiB
Python
import esphome.codegen as cg
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import esphome.config_validation as cv
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from esphome.components import spi
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from esphome.const import CONF_ID, CONF_DATA_RATE, CONF_MODE
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DEPENDENCIES = ["spi"]
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CODEOWNERS = ["@clydebarrow"]
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MULTI_CONF = True
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spi_device_ns = cg.esphome_ns.namespace("spi_device")
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spi_device = spi_device_ns.class_("SPIDeviceComponent", cg.Component, spi.SPIDevice)
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Mode = spi.spi_ns.enum("SPIMode")
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MODES = {
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"0": Mode.MODE0,
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"1": Mode.MODE1,
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"2": Mode.MODE2,
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"3": Mode.MODE3,
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"MODE0": Mode.MODE0,
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"MODE1": Mode.MODE1,
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"MODE2": Mode.MODE2,
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"MODE3": Mode.MODE3,
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}
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BitOrder = spi.spi_ns.enum("SPIBitOrder")
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ORDERS = {
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"msb_first": BitOrder.BIT_ORDER_MSB_FIRST,
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"lsb_first": BitOrder.BIT_ORDER_LSB_FIRST,
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}
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CONF_BIT_ORDER = "bit_order"
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CONFIG_SCHEMA = cv.Schema(
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{
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cv.GenerateID(CONF_ID): cv.declare_id(spi_device),
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cv.Optional(CONF_DATA_RATE, default="1MHz"): spi.SPI_DATA_RATE_SCHEMA,
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cv.Optional(CONF_BIT_ORDER, default="msb_first"): cv.enum(ORDERS, lower=True),
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cv.Optional(CONF_MODE, default="0"): cv.enum(MODES, upper=True),
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}
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).extend(spi.spi_device_schema(False))
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async def to_code(config):
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var = cg.new_Pvariable(config[CONF_ID])
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await cg.register_component(var, config)
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cg.add(var.set_data_rate(config[CONF_DATA_RATE]))
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cg.add(var.set_mode(config[CONF_MODE]))
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cg.add(var.set_bit_order(config[CONF_BIT_ORDER]))
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await spi.register_spi_device(var, config)
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